In an advanced device adopting a large diameter silicon wafer typified by a silicon wafer having a diameter of 300 mm, for example, a stepper adopting a technology (immersion exposure technology) for enhancing the resolution by sandwiching liquid (normally, pure water) between an objective lens and a silicon wafer is gradually being adopted. In exposure using this technology, if a wafer chamfered portion varies in shape, the liquid tends to leak from the wafer chamfered portion when the outermost edge of the wafer is scanned. Thus, many device makers are required to conduct a review, such as shortening the dimensions of the wafer chamfered shape, or improve the dimensional precision.
Moreover, in order to improve productivity of a heat treatment process in which diffusion or film formation in a device process is performed, the time the temperature takes to rise and fall during the heat cycle tends to be shortened. In this case, larger thermal shock than in the past acts on the silicon wafer, causing a crack in the wafer. At the same time, as the conveyance-related speed is improved, a wafer crack may occur due to a contact between a wafer chamfered portion and a conveying portion or a wafer carrier. In order to produce resistance to these thermal stress and mechanical stress, there emerges a need to define the cross-sectional shape dimensions of a chamfered portion of a silicon wafer rigorously.
Here, the cross-sectional shape dimensions of a chamfered portion are explained based on an example of the cross-sectional shape of a chamfered portion shown in FIG. 17. As for the standards for the cross-sectional shape of a chamfered portion, the dimensions are defined as follows.
(1) A position of a point P1 at which a reference L2 at a distance of 450 μm away from a chamfered portion farthest end reference L1 toward the center of the wafer intersects with a front surface-side chamfered portion cross-section is set as a front surface reference L3. In the chamfered portion, a straight line connecting a point P2 which is located at a distance of 25 μm parallel to the reference L3 away from the reference L3 and a point P3 located at a distance of 70 μm parallel to the reference L3 away from the reference L3 is defined as L6. And the angle which the reference L3 forms with the straight line L6 is defined as θ1. Likewise, on the back surface side, θ2 is defined. In general, they are referred to as the angle of chamfer.
(2) A point of intersection of the reference L3 with the straight line L6 is defined as a point P4, and a distance between the point P4 and the reference L1 is defined as A1. Likewise, on the back surface side, A2 is defined. They are generally referred to as a surface width.
(3) A distance between a point P5 and a point P6, at which a straight line L7 which is a line moved 50 μm from the chamfered portion end reference L1 parallel to it toward the center of the wafer intersects with a chamfered portion cross-section, is defined as BC. This is also, in general, referred to as a surface width.
The measurement of the above dimensions is carried out by performing binarization image processing on a captured image by a common transmitted light method. It is common to carry out the measurement at four or eight points in the plane of a wafer with reference to a notch position (see FIG. 18 showing an example of the measurement points of the cross-sectional shape dimensions of the chamfered portion).
When the measurement is carried out at four points, these points are four points at intervals of 90° including the neighborhood of a notch (for example, a point which is 9° distant from the notch). Also, when the measurement is carried out at eight points, these points are eight points at intervals of 45° including the neighborhood of the notch (for example, a point which is 9° distant from the notch). However, the measurement points are not limited to them. Furthermore, a point, which is 9° distant from the notch is set as a measurement point because no chamfered portion is present in the notch portion, and the angle is not particularly limited to 9°.
Although the target values (the center values of the standards) of the cross-sectional shape parameters A1, A2, BC, θ1, and θ2 of the chamfered portion described above vary among customers who manufacture a device, the desired values and specification values of variations in these parameters are becoming increasingly rigorous with each passing year. Required variations are expected to be ±80 μm or less for the 65 nm node, ±40 μm or less for the 45 nm node, and ±25 μm or less for the 32 nm node.
Amid calls for the equalization of such cross-sectional shape dimensions of a chamfered portion, so far, a silicon wafer has been produced by a production process shown in FIG. 4.
First, as shown in FIG. 4(A), it is common to sequentially perform a slicing process for cutting a thin wafer from a single crystal ingot, a chamfering process for preventing a break of the outer edge of the wafer, a lapping process or a double-side grinding process for eliminating variations in the thickness of the wafer, an etching process for removing mechanical damage or contamination introduced by the chamfering, lapping, or grinding, and a mirror polishing process for polishing the chamfered portion and the principal surface or both surfaces of the wafer to a mirror surface. In particular, in order to achieve a rigorous precision of the chamfered shape, chamfering processing is performed again after lapping or grinding of the front and back surfaces.
Moreover, recently, with the aim of reducing the chamfering process, as shown in FIG. 4(B), a method in which chamfering is performed in only one stage after double-side grinding has been devised.
Incidentally, when the lapping process is performed in the production method of FIG. 4(A), it is necessary to perform rough chamfering before lapping.
In the chamfering process of FIG. 4, in general, chamfering is performed by pressing a chamfering wheel having a formed groove against the outer edge of a wafer and thereby transferring the shape of the groove to the wafer (in FIG. 5, an outline of an example of a form chamfering method is shown). Since the wheel rotates at high speed, and the wafer also rotates, it is possible to transfer the chamfered shape uniformly in a direction of the circumference of the wafer.
Furthermore, in the lapping process, processing is performed on the wafer held by a carrier in the space between rotating cast-iron upper and lower turn tables while supplying slurry containing suspended abrasive grains consisting mainly of alumina. In the double-side grinding process, processing is performed with the wafer held in the space between wheels facing each other and rotating at high speed, the wheels formed with grindstones containing dispersed diamond abrasive grains.
Furthermore, in order to meet a rigorous requirement for flatness, in the etching process, an alkaline solution, such as a sodium hydroxide solution or a potassium hydroxide solution, that is highly capable of maintaining the shape of the front and back surfaces of a lap or a raw material wafer is used. This is because acid etching may reduce the flatness of the principal surface.
As described above, in order to achieve the equalization of the cross-sectional shape dimensions of a chamfered portion, a production method in which it is common practice to chamfer the outer edge of a silicon wafer in circumferential positions into a uniform shape generally in the chamfering process, and then the etching process is performed by alkali etching that is highly capable of maintaining the shape of the front and back surfaces has so far been used.
However, since an alkalie solution has crystal orientation-dependent etching anisotropy, the silicon wafer after the etching process shows different degrees of surface roughness depending on the circumferential position of the chamfered portion corresponding to the crystal orientation (see Japanese Unexamined Patent Publication (Kokai) No. 2001-87996). In addition, the shape of cross section varies.
Therefore, with the above-described conventional production method, it was impossible to meet the recent demands to reduce variations in the cross-sectional shape dimensions of the chamfered portion to extremely small variations, for example, to ±25 mm or less for the 32 nm node.